An Analog Predistorter Based on Delay Line Compensating Memory Effect
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Author NameAffiliation
HAN Dong1,XU Gao-ming1,2,LIU Tai-jun1,HUANG Li1 1. Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo 315211, China
2. State Key Laboratory of Millimeter Waves, Southeast University, Nanjing 210096, China 
Fund Project:国家自然科学基金(U1809203,62071264),浙江省自然科学基金(LY21F010004),浙江省省属高校基本科研 业务费(SJLY2020013)
 
Abstract:The analog predistorter has the advantages of wide bandwidth, simple structure, low power consumption and low delay,which meets the requirements of the fifth-generation mobile communication system (5G) and beyond-5G power amplifier linearization for large bandwidth, low power consumption and low delay. However, with the development of mobile communication systems, the signal bandwidth and modulation degree are getting higher and higher, and the memory effect of the power amplifier (PA) is getting stronger and stronger. The traditional analog predistorter cannot compensate the memory effect of the PA. Therefore, to solve the memory effect compensation problems of analog predistortion circuits, this paper proposes a Schottky diode analog predistorter (SDD-APD) based on the delay line compensating memory effects. The proposed analog predistorter uses a microstrip line of unequal length as the delay line to compensate the memory effect of the PA. The test results under a class AB power amplifier operating at 3. 5 GHz with a 100 MHz bandwidth 5G NR signal show that the proposed analog predistorter can compensate the memory effects of the power amplifier and reduce the nonlinearity of the PA by more than 10 dB.
keywords:5G, memory effect, analog predistortion, Schottky diode, power amplifier
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